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| Integrated Circuit Systems, Inc. ICS8304I LOW SKEW, 1-TO-4 LVCMOS / LVTTL FANOUT BUFFER FEATURES * 4 LVCMOS / LVTTL outputs * LVCMOS clock input * CLK can accept the following input levels: LVCMOS, LVTTL * Maximum output frequency: 166MHz * Output skew: 60ps (maximum) * Part-to-part skew: 650ps (maximum) * Small 8 lead SOIC package saves board space * 3.3V input, outputs may be either 3.3V or 2.5V supply modes * -40C to 85C ambient operating temperature GENERAL DESCRIPTION The ICS8304I is a low skew, 1-to-4 Fanout Buffer and a member of the HiPerClockSTM HiPerClockSTM family of High Performance Clock Solutions from ICS. The ICS8304I is characterized at full 3.3V for input VDD, and mixed 3.3V and 2.5V for output operating supply modes (VDDO). Guaranteed output and part-to-part skew characteristics make the ICS8304I ideal for those clock distribution applications demanding well defined performance and repeatability. ,&6 BLOCK DIAGRAM Q0 PIN ASSIGNMENT VDDO VDD CLK GND 1 2 3 4 8 7 6 5 Q3 Q2 Q1 Q0 Q1 CLK Q2 ICS8304I 8-Lead SOIC 3.8mm x 4.8mm, x 1.47mm package body M Package Top View Q3 8304AMI www.icst.com/products/hiperclocks.html 1 REV. B APRIL 4, 2002 Integrated Circuit Systems, Inc. ICS8304I LOW SKEW, 1-TO-4 LVCMOS / LVTTL FANOUT BUFFER Type Power Power Input Power Output Output Output Output Pulldown Description Output supply pin. Connect to 3.3V or 2.5V. Positive supply pin. Connect to 3.3V. LVCMOS / LVTTL clock input. Power supply ground. Connect to ground. Single clock output. LVCMOS / LVTTL interface levels. Single clock output. LVCMOS / LVTTL interface levels. Single clock output. LVCMOS / LVTTL interface levels. Single clock output. LVCMOS / LVTTL interface levels. TABLE 1. PIN DESCRIPTIONS Number 1 2 3 4 5 6 7 8 Name VDDO VDD CLK GND Q0 Q1 Q2 Q3 NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN CHARACTERISTICS Symbol CIN C PD RPULLUP RPULLDOWN ROUT Parameter Input Capacitance Power Dissipation Capacitance (per output) Input Pullup Resistor Input Pulldown Resistor Output Impedance Test Conditions Minimum Typical Maximum 4 VDD, VDDO = 3.465V 51 51 7 15 Units pF pF K K 8304AMI www.icst.com/products/hiperclocks.html 2 REV. B APRIL 4, 2002 Integrated Circuit Systems, Inc. ICS8304I LOW SKEW, 1-TO-4 LVCMOS / LVTTL FANOUT BUFFER 4.6V -0.5V to VDD+ 0.5V -0.5V to VDDO + 0.5V 112.7C/W (0 lfpm) -65C to 150C ABSOLUTE MAXIMUM RATINGS Supply Voltage, VDDx Inputs, VI Outputs, VO Package Thermal Impedance, JA Storage Temperature, TSTG Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDO = 3.3V5%, TA = -40C TO 85C Symbol VDD VDDO IDD IDDO Parameter Power Supply Voltage Output Power Supply Voltage Power Supply Current Output Supply Current Test Conditions Minimum 3.135 3.135 Typical 3.3 3.3 Maximum 3.465 3.465 18 11 Units V V mA mA TABLE 3B. LVCMOS / LVTTL DC CHARACTERISTICS, VDD = VDDO = 3.3V5%, TA = -40C TO 85C Symbol VIH VIL IIH IIL VOH Parameter Input High Voltage Input Low Voltage Input High Current Input Low Current Output High Voltage VDD = VIN = 3.465V VDD = 3.465V, VIN = 0V Refer to NOTE 1 IOH = -16mA IOH = -100uA Refer to NOTE 1 VOL Output Low Voltage IOL = 16mA IOL = 100uA -5 2.6 2.9 3 0.5 0.25 0.15 Test Conditions Minimum 2 -0.3 Typical Maximum VDD + 0.3 1.3 150 Units V V A A V V V V V V NOTE 1: Outputs terminated with 50 to VDDO/2. See Parameter Measurement Section, "3.3V Output Load Test Circuit". 8304AMI www.icst.com/products/hiperclocks.html 3 REV. B APRIL 4, 2002 Integrated Circuit Systems, Inc. ICS8304I LOW SKEW, 1-TO-4 LVCMOS / LVTTL FANOUT BUFFER Test Conditions 166MHz f = 133MHz 30% to 70% 30% to 70% 250 250 Minimum 2 Typical Maximum 166 3.3 50 600 500 500 60 Units MHz ns ps ps ps ps % TABLE 4A. AC CHARACTERISTICS, VDD = VDDO = 3.3V5%, TA = -40C TO 85C Symbol Parameter fMAX tpLH Output Frequency Propagation Delay, Low-to-High; NOTE 1 Output Skew; NOTE 2, 4 Par t-to-Par t Skew; NOTE 3, 4 Output Rise Time Output Fall Time tsk(o) tsk(pp) tR tF odc Output Duty Cycle 40 All parameters measured at 166MHz unless noted otherwise. NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output. NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at VDDO/2. NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions. Using the same type of inputs on each device, the outputs are measured at VDDO/2. NOTE 4: This parameter is defined in accordance with JEDEC Standard 65. TABLE 3C. POWER SUPPLY DC CHARACTERISTICS, VDD = 3.3V5%, VDDO = 2.5V5%, TA = -40C TO 85C Symbol VDD VDDO IDD IDDO Parameter Positive Supply Voltage Output Supply Voltage Power Supply Current Output Supply Current Test Conditions Minimum 3.135 2.375 Typical 3.3 2.5 Maximum 3.465 2.625 18 11 Units V V mA mA TABLE 3D. LVCMOS / LVTTL DC CHARACTERISTICS, VDD = 3.3V5%, VDDO = 2.5V5%, TA = -40C TO 85C Symbol VIH VIL IIH IIL VOH Parameter Input High Voltage Input Low Voltage Input High Current Input Low Current Output High Voltage; NOTE 1 VDD = VIN = 3.465V VDD = 3.465V, VIN = 0V -5 2.1 0.5 Test Conditions Minimum 2 -0.3 Typical Maximum VDD + 0.3 1.3 150 Units V V A A V V Output Low Voltage; NOTE 1 VOL NOTE 1: Outputs terminated with 50 to VDDO/2. See Parameter Measurement Section, "3.3V/2.5V Output Load Test Circuit". 8304AMI www.icst.com/products/hiperclocks.html 4 REV. B APRIL 4, 2002 Integrated Circuit Systems, Inc. ICS8304I LOW SKEW, 1-TO-4 LVCMOS / LVTTL FANOUT BUFFER Test Conditions 166MHz f = 133MHz 30% to 70% 30% to 70% 250 250 Minimum 2.3 Typical Maximum 166 3.7 60 650 500 500 60 Units MHz ns ps ps ps ps % TABLE 4B. AC CHARACTERISTICS, VDD = 3.3V5%, VDDO = 2.5V5%, TA = -40C TO 85C Symbol Parameter fMAX tpLH Output Frequency Propagation Delay, Low-to-High; NOTE 1 Output Skew; NOTE 2, 4 Par t-to-Par t Skew; NOTE 3, 4 Output Rise Time Output Fall Time tsk(o) tsk(pp) tR tF odc Output Duty Cycle 40 All parameters measured at 166MHz unless noted otherwise. NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output. NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at VDDO/2. NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions. Using the same type of inputs on each device, the outputs are measured at VDDO/2. NOTE 4: This parameter is defined in accordance with JEDEC Standard 65. 8304AMI www.icst.com/products/hiperclocks.html 5 REV. B APRIL 4, 2002 Integrated Circuit Systems, Inc. ICS8304I LOW SKEW, 1-TO-4 LVCMOS / LVTTL FANOUT BUFFER PARAMETER MEASUREMENT INFORMATION 1.65V5% VDD, VDDO Qx SCOPE LVCMOS GND -1.65V5% 3.3V OUTPUT LOAD TEST CIRCUIT 2.05V5% 1.25V5% V DD VDDO SCOPE LVCMOS GND Qx -1.25V5% 3.3V/2.5V OUTPUT LOAD TEST CIRCUIT 8304AMI www.icst.com/products/hiperclocks.html 6 REV. B APRIL 4, 2002 Integrated Circuit Systems, Inc. ICS8304I LOW SKEW, 1-TO-4 LVCMOS / LVTTL FANOUT BUFFER VDDO 2 Qx Qy VDDO 2 tsk(o) OUTPUT SKEW PART 1 Qx VDDO 2 PART 2 Qy VDDO 2 tsk(pp) PART-TO-PART SKEW 70% 70% 30% Clock Inputs and Outputs t t 30% R F INPUT AND OUTPUT RISE AND FALL TIME 8304AMI www.icst.com/products/hiperclocks.html 7 REV. B APRIL 4, 2002 Integrated Circuit Systems, Inc. ICS8304I LOW SKEW, 1-TO-4 LVCMOS / LVTTL FANOUT BUFFER V DD CLK 2 V DDO Q0:Q3 2 t PD PROPAGATION DELAY V Q0 :Q3 DDO V DDO V DDO 2 t PW 2 2 t t odc = t PW PERIOD PERIOD tPW & tPERIOD 8304AMI www.icst.com/products/hiperclocks.html 8 REV. B APRIL 4, 2002 Integrated Circuit Systems, Inc. TABLE 5. JAVS. AIR FLOW TABLE ICS8304I LOW SKEW, 1-TO-4 LVCMOS / LVTTL FANOUT BUFFER qJA by Velocity (Linear Feet per Minute) 0 Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards 153.3C/W 112.7C/W 200 128.5C/W 103.3C/W 500 115.5C/W 97.1C/W NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs. TRANSISTOR COUNT The transistor count for ICS8304I is: 416 8304AMI www.icst.com/products/hiperclocks.html 9 REV. B APRIL 4, 2002 Integrated Circuit Systems, Inc. ICS8304I LOW SKEW, 1-TO-4 LVCMOS / LVTTL FANOUT BUFFER PACKAGE OUTLINE - SUFFIX M TABLE 6. PACKAGE DIMENSIONS - SUFFIX M SYMBOL N A A1 B C D E e H h L 5.80 0.25 0.40 0 1.35 0.10 0.33 0.19 4.80 3.80 1.27 BASIC 6.20 0.50 1.27 8 Millimeters MINIMUN 8 1.75 0.25 0.51 0.25 5.00 4.00 MAXIMUM Reference Document: JEDEC Publication 95, MS-012 8304AMI www.icst.com/products/hiperclocks.html 10 REV. B APRIL 4, 2002 Integrated Circuit Systems, Inc. ICS8304I LOW SKEW, 1-TO-4 LVCMOS / LVTTL FANOUT BUFFER Marking 8304AMI 8304AMI Package 8 lead SOIC 8 lead SOIC on Tape and Reel Count 96 per tube 2500 Temperature -40C to 85C -40C to 85C TABLE 7. ORDERING INFORMATION Part/Order Number ICS8304AMI ICS8304AMIT While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial and industrial applications. Any other applications such as those requiring high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 8304AMI www.icst.com/products/hiperclocks.html 11 REV. B APRIL 4, 2002 Integrated Circuit Systems, Inc. ICS8304I LOW SKEW, 1-TO-4 LVCMOS / LVTTL FANOUT BUFFER REVISION HISTORY SHEET Description of Change LVCMOS/LVTTL DC Characteristics Table, added IOH and IOL Test Conditions to VOH and VOL rows. Date 4/4/02 Rev B Table 3B Page 3 8304AMI www.icst.com/products/hiperclocks.html 12 REV. B APRIL 4, 2002 |
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